Dual Remote/Local Temperature Sensors with
SMBus Serial Interface
______________________________________________________________________________________ 11
REGISTER
ADDRESS
POR STATE
FUNCTION
RLTS
00 h
0000 0000
(0癈)
Read internal temperature
RRTE
01 h
0000 0000
(0癈)
Read external channel 1 temperature if bit 3 of configuration register is 0;
Read external channel 2 temperature if bit 3 of configuration register is 1
RSL1
02 h
1000 0000
Read status register 1
RCL
03 h
0000 0000
Read configuration byte (fault queue should be disabled at startup)
RCRA
04 h
0000 0110
Read conversion rate byte
RLHN
05 h
0100 0110
(+70癈)
Read internal ALERT high limit
RLLI
06 h
1100 1001
(-55癈)
Read internal ALERT low limit
RRHI
07 h
0100 0110
(+70癈)
Read external channel 1 ALERT high limit if bit 3 of configuration register is 0;
Read external channel 2 ALERT high limit if bit 3 of configuration register is 1
RRLS
08 h
1100 1001
(-55癈)
Read external channel 1 ALERT low limit if bit 3 of configuration register is 0;
Read external channel 2 ALERT low limit if bit 3 of configuration register is 1
WCA
09 h
0010 0000
Write configuration byte
WCRW
0A h
0000 0110
Write conversion rate byte
WLHO
0B h
0100 0110
(+70癈)
Write internal ALERT high limit
WLLM
0C h
1100 1001
(-55癈)
Write internal ALERT low limit
WRHA
0D h
0100 0110
(+70癈)
Write external channel 1 ALERT high limit if bit 3 of configuration register is 0;
Write external channel 2 ALERT high limit if bit 3 of configuration register is 1
WRLN
0E h
1100 1001
(-55癈)
Write external channel 1 ALERT low limit if bit 3 of configuration register is 0;
Write external channel 2 ALERT low limit if bit 3 of configuration register is 1
OSHT
0F h
0000 0000
One shot
REET
10 h
0000 0000
Read extended temp of external channel 1 if bit 3 of configuration register is 0;
Read extended temp of external channel 2 if bit 3 of configuration register is 1
RIET
11 h
0000 0000
Read internal extended temperature
RSL2
12 h
0000 0000
Read status register 2
RWO2E
16 h
0111 1000
(+120癈)
Read/write external OT2 limit for channel 1 if bit 3 of configuration register is 0;
Read/write external OT2 limit for channel 2 if bit 3 of configuration register is 1
RWO2I
17 h
0101 1010
(+90癈)
Read/write internal OT2 limit
RWO1E
19 h
0101 1010
(+90癈)
Read/write external OT1 limit for channel 1 if bit 3 of configuration register is 0;
Read/write external OT1 limit for channel 2 if bit 3 of configuration register is 1
RWO1I
20 h
0100 0110
(+70癈)
Read/write internal OT1 limit
Table 5. Command-Byte Register Bit Assignments
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